NXP Semiconductors /MIMXRT1064 /IOMUXC /SW_MUX_CTL_PAD_GPIO_SD_B0_00

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SW_MUX_CTL_PAD_GPIO_SD_B0_00

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALT0)MUX_MODE 0 (DISABLED)SION

MUX_MODE=ALT0, SION=DISABLED

Description

SW_MUX_CTL_PAD_GPIO_SD_B0_00 SW MUX Control Register

Fields

MUX_MODE

MUX Mode Select Field.

0 (ALT0): Select mux mode: ALT0 mux port: USDHC1_CMD of instance: usdhc1

1 (ALT1): Select mux mode: ALT1 mux port: FLEXPWM1_PWMA00 of instance: flexpwm1

2 (ALT2): Select mux mode: ALT2 mux port: LPI2C3_SCL of instance: lpi2c3

3 (ALT3): Select mux mode: ALT3 mux port: XBAR1_INOUT04 of instance: xbar1

4 (ALT4): Select mux mode: ALT4 mux port: LPSPI1_SCK of instance: lpspi1

5 (ALT5): Select mux mode: ALT5 mux port: GPIO3_IO12 of instance: gpio3

6 (ALT6): Select mux mode: ALT6 mux port: FLEXSPIA_SS1_B of instance: flexspi

8 (ALT8): Select mux mode: ALT8 mux port: ENET2_TX_EN of instance: enet2

9 (ALT9): Select mux mode: ALT9 mux port: SEMC_DQS4 of instance: semc

SION

Software Input On Field.

0 (DISABLED): Input Path is determined by functionality

1 (ENABLED): Force input path of pad GPIO_SD_B0_00

Links

() ()